The present invention generally relates to interconnection of semiconductor integrated circuits and more particularly to a method of growing a refractory metal in a groove formed in an insulator layer covering a semiconductor device in an integrated circuit such that the semiconductor devices are connected by a wire of the refractory metal filling the groove.
Generally, aluminium is used for connecting various semiconductor devices in conventional integrated circuits. In the integrated circuits, the semiconductor devices are buried under an insulator layer such as phosphosilicate glass (PSG) or silica (SiO.sub.2) and electrical interconnection for achieving a desired circuit is made through a contact hole provided on the insulator layer in correspondence to the semiconductor device. In a typical procedure for establishing such an electrical interconnection, a layer of aluminium is deposited on the insulator layer including the contact holes and the aluminium layer thus deposited is then patterned by etching. Aluminium is preferred because of its low resistivity and firm contact with the insulator layer underneath.
However, aluminium interconnection has a problem in that it is susceptible to electromigration. As a consequence, there is a substantial risk that the electrical connection fails particularly when the thickness or width of aluminium wire used for interconnection is reduced. Note that very large scale integrated circuits (VLSI) currently studied for future deployment use a conductor width of about 0.4 .mu.m or less. Further, such an extremely fine aluminium wire is fragile to the stress migration as is commonly known. Furthermore, as the height of the wire cannot be reduced below about 1 .mu.m in order to secure sufficiently low resistance and sufficiently low current density, the wire has to have a very large aspect ratio or height/width ratio which obviously invites mechanical as well as electrical unstability. More specifically, when a protective layer of PSG and the like is provided on the insulator layer so as to bury the conductor strip having such a high aspect ratio for protection, the protective layer thus deposited tends to have a surface which is undulated in correspondence to the conductor strip underneath. Associated therewith, there is a substantial risk that a top part of the conductor strip extending upwards from the insulator layer is not sufficiently covered or even exposed. When this occurs, conductor layer or wires provided above the protective layer to form a multilevel interconnection may be damaged or contacted to the wires in the underlying layer. Further, there may be an unfilled space remained between adjacent conductor strips particularly when the integration density of the integrated circuit is increased and the separation between the conductor strips is reduced.
In order to avoid foregoing problems, it is studied to use refractory metals such as tungsten which suffers less from internal stress because of relatively small thermal expansion and which is less susceptible to the electromigration because of large bonding energy, in place of aluminium. Further, in order to achieve a mechanical stability, it is studied to grow the metal conductor strip directly in a groove which is previously provided on the insulator layer. Note that refractory metal such as tungsten tends to be detached from a substrate when deposited uniformly in a form of layer with a thickness exceeding about 1 .mu.m.
Meanwhile, there are a number of known methods of growing refractory metals on a part of semiconductor device exposed by a contact hole such that the contact hole is filled by the refractory metal. Thus, Japanese Laid-open Patent Applications No. 72131/1984 and No. 125647/1987, for example, describe filling of the contact hole by selective growth of tungsten on the part of the semiconductor device exposed by the contact hole. As the growth of tungsten is started from the semiconductor device at the bottom of the contact hole, the obtained tungsten layer filling the contact hole is dense and a solid connection is achieved between the tungsten and the aluminium conductor wire extending above the insulator layer in which the contact hole is penetrated. In any of these prior art methods, the selective growth of tungsten is simply achieved by usual chemical vapor deposition technique, as the tungsten atoms formed as a result of decomposition of source gas are preferentially deposited on a semiconductor surface of the device rather than on a side wall or top surface of the insulator layer.
When filling the groove provided on the insulator layer by tungsten, such a simple procedure of deposition is not possible as there is no exposed semiconductor part on which tungsten is preferentially deposited. This, Laid-open Japanese Patent Application No. 139026/1986 in which the applicant is the assignee of the present application, describes initial deposition of polycrystalline silicon on a side wall as well as on a bottom of the groove and subsequent deposition of tungsten using such a polysilicon layer as the nuclei. According to this procedure, however, there is a problem in that the growth of tungsten is made laterally from both side walls and there is a substantial risk that void remains in the tungsten filling the groove because of the lateral growth which tends to close a top opening of the groove.
Alternatively, Japanese Laid-open Patent Application No. 141740/1987 discloses a method wherein the side wall of the groove is covered by polysilicon and the growth of tungsten is achieved laterally, starting from such a polysilicon layer covering the side wall of the groove. According to this method, too, there is a problem of void formation associated with the lateral growth of tungsten. Such a void in the interconnection wire increases the resistivity as well as the chance that the interconnection is failed.